ASSET InterTech's Boundary-Scan Test, Processor-Controlled Test and Intel® IBIST form a unique set of tools for access to, and control of embedded instrumentation.
Circuit boards featuring the recently introduced Intel® Xeon® processor 5500 series (codenamed Nehalem) have unique test and validation needs. Non-intrusive test technologies based on embedded instrumentation vow to provide the required test and validation coverage. Such coverage has become increasingly critical because it has diminished in recent years from older, intrusive test technologies like in-circuit test (ICT), manufacturing defect analyzers (MDAs), flying probe testers, and others. As a result, non-intrusive embedded instrumentation test technologies will be required to thoroughly test and validate new embedded applications featuring this processor series.
"Driving 3D Chip and Circuit Board T%est into High Gear" by Al Crouch, CTO Core Instruments, Future-Fab International, April 2010 (pdf)
"3D-Chips auf dem Vormarsch: Herausforderungen bei Testverfahren" by Glenn Woppman, President & CEO, Embedded Design Germany, April 2010
"TAP und IJTAG: Synergie zweier zukunftsträchtiger Standards" by Glenn Woppman, EPP Europe, March 2010 (pdf)
"Embedded Instrumentation Has Intel® Xeon® Processor 5500 Series Designs Covered” by Tim Caffee, Embedded Intel Solutions Winter 2010 (pdf)
"Embedded Instrumentation Delivers Test/Validation Coverage on Intel Xeon 5500 Boards" Tim Caffee. ATCA Newsletter, February 2010 (pdf)
"Approaching Board Test Non-intrusively" by Alan Sguigna. Evaluation Engineering Magazine, December 2009. (pdf)
"Embedded Instruments - Messtechnik im Chip" by Al Crouch, chief technologist, core instrumentation, elektronik industrie (November 2009) (pdf)
"Non-Intrusive
Board Test Gains Momentum"
by Reg Waller, EPN (November 2009) (pdf)
"Test
Standards Emerge to Improve 3D-Chip Yield"
SOCcentral (October 2009) (pdf)
"Open Tools and Standards Emerge for Embedded Instrumentation" by Al Crouch, chief technologist, core instrumentation, Evaluation Engineering (February 2009)
"An
Inside Job"
CIE - Components in Electronics (November 2008)
"Perfect
Storm Brewing for Chip and Circuit Board Test"
SOCcentral (October 2008)
"Embedded
Instrumentation and Boundary Scan"
Electronic Products (September 2008)
"Boundary
Scan Skews Test Coverage Tradeoffs in your Favor"
BestTest Newsletter (May 2007)
"Glenn
Woppman describes the new IJTAG and SJTAG initiatives at ITC"
Test & Measurement World - Audio Interview (October 2006)
"Expanded
Role for JTAG DFT"
Evaluation Engineering (October 2006)
"Tackling
tough problems"
Embedded System Engineering (Sept. 2005)
"Boundary
scan goes underground"
Test & Measurement World (Sept. 2005)
"The
Boundary Scan Infrastructure "
Circuits Assembly (June 2005)
"Making
Moves from Board to System Test"
Electronics Manufacture and Test (June 2005) p. 11
"Boundary
Scan's Horizons are Expanding"
Components in Electronics (June 2005) p.12
"Boundary
Scan and Processor Emulation Achieve Synergy"
Evaluation Engineering (May 2005) p. 56
"Boundary
Scan Benefits Lead-Free Assembly"
SMT Magazine (March 2005)
PRIVACY STATEMENT | CONTACT US | RESOURCES
2201 N. Central Expy., Ste 105, Richardson, TX 75080
(888) 694-6250 or (972) 437-2800
Copyright © 2001-2010 ASSET InterTech
Inc. All rights reserved.