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Memory Test with Bit Level Failure
Memory Test with Bit Level Failure

ASSET Closed Chassis Controller
ASSET Closed Chassis Controller

ASSET Closed Chassis Controller for Intel Designs using USB3 - Direct Connect Interface

IJTAG network with functional test and programming IP
IJTAG network with functional test and programming IP

SourcePoint Trace on 6th Generation Intel Core processor featuring Trace Hub
SourcePoint Trace on 6th Generation Intel Core processor featuring Trace Hub

ScanWorks logo with tag line
ScanWorks logo with tag line

ScanWorks logo without tag line
ScanWorks logo without tag line

SourcePoint by ASSET InterTech logo
SourcePoint by ASSET InterTech logo

SourcePoint by ASSET InterTech logo for Partners.

SourcePoint logo with tag line
SourcePoint logo with tag line

SourcePoint logo without tag line
SourcePoint logo without tag line

ASSET logo without tag line
ASSET logo without tag line

SourcePoint Debugger
SourcePoint Debugger

ASSET’s SourcePoint debugger examining ThreadX resources for the active software thread.

ARM’s System Trace Macrocell (STM)
ARM’s System Trace Macrocell (STM)

Arium ECM-XDP3 Run-Control Probe
Arium ECM-XDP3 Run-Control Probe

Arium LX-1000 Trace Port Analyzer
Arium LX-1000 Trace Port Analyzer

How to Debug Dead Boards Image
How to Debug Dead Boards Image

Block Diagram Showing Functional Test with JTAG
Block Diagram Showing Functional Test with JTAG

ScanWorks PXI-1000 Hardware
ScanWorks PXI-1000 Hardware

ScanWorks PXI Controller Card
ScanWorks PXI Controller Card

Eye Diagram with Mask
Eye Diagram with Mask

ASSET HSIO Eye Diagram with Mask

Teradyne's PXI Express-based High Speed Subsystem
Teradyne's PXI Express-based High Speed Subsystem

Teradyne’s PXI Express-based High Speed Subsystem (HSSub)

ScanWorks HSIO tools for Intel Atom micro server designs
ScanWorks HSIO tools for Intel Atom micro server designs

Intel® Atom™ processor

Memory Test Instrument
Memory Test Instrument

Block diagram of a memory test instrument, extracted from our Memory Test eBook.

... more

ScanWorks PCIe controllers
ScanWorks PCIe controllers

ScanWorks high-speed PCI Express (PCIe) bus controllers

ScanWorks Eye Diagram
ScanWorks Eye Diagram

ScanWorks® eye diagram from Intel® IBIST 

ScanWorks RIC-4000
ScanWorks RIC-4000

Four Port Remote Instrumentation Controller.

ScanWorks FPGA-Controlled Test
ScanWorks FPGA-Controlled Test

ScanWorks® FPGA-Controlled Test (FCT) coverage diagram. 

ScanWorks Component Action
ScanWorks Component Action

ScanWorks® Component action user interface.

ScanWorks HSIO
ScanWorks HSIO

ScanWorks® HSIO for Intel® µ-architecture codenamed Haswell

BSDL Validation Service
BSDL Validation Service

Teradyne Di-Series instruments
Teradyne Di-Series instruments

Capable of running ScanWorks® boundary-scan tests

ScanWorks Component Action
ScanWorks Component Action

ScanWorks® Component Action graphic

ScanWorks PCI-200EJ Controller
ScanWorks PCI-200EJ Controller

Embedded Boundary Scan
Embedded Boundary Scan

Master/Slave System Level JTAG Implementation
Master/Slave System Level JTAG Implementation

ScanWorks RIC-1000
ScanWorks RIC-1000

Single-Port Remote Instrumentation Controller

ScanWorks Remote Instrumentation Controller
ScanWorks Remote Instrumentation Controller

Worldwide Test via the Internet

IEEE 1149.1 JTAG and Boundary Scan Tutorial
IEEE 1149.1 JTAG and Boundary Scan Tutorial

LGA 1366 Interposer
LGA 1366 Interposer

LGA1366 Interposer for Intel® Xeon® Processor 5500 Series and Intel® Core™ i7 processors. Used to access the CPU's... more

ScanWorks Intel IBIST Eye Diagram
ScanWorks Intel IBIST Eye Diagram

ScanWorks Block Diagram
ScanWorks Block Diagram

ScanWorks® for Intel® Xeon® Processors 5500 Series – Block Diagram

ScanWorks High-Speed I/O Validation
ScanWorks High-Speed I/O Validation

ScanWorks® for Intel® Xeon® Processors 5500 Series on Laptop

ScanWorks IJTAG
ScanWorks IJTAG

ScanWorks® IJTAG Screen –  Define an IJTAG Instrument Action

Glenn Woppman
Glenn Woppman

Glenn Woppman, President & CEO, ASSET InterTech 

On-site Technician
On-site Technician

Tim Dehne
Tim Dehne

Tim Dehne, member of the ASSET board of directors. 

Backgrounders

FPGA-Controlled Test Backgrounder
FPGA-Controlled Test Backgrounder

FPGA-Controlled Test (FCT) Backgrounder
 "Board-tester-in-a-chip"

Embedded Instrumentation Position Paper
Embedded Instrumentation Position Paper

Embedded Instrumentation Ushers in a New Era for the Test and Measurement Industry

ASSET Company Backgrounder
ASSET Company Backgrounder

Driving embedded instrumentation for chip, board and system validation, debug and test

Press Kits

ARM TechCon 2013 Press Kit
ARM TechCon 2013 Press Kit

ARM TechCon Press Kit, October 29 - 31, 2013