|
IJTAG tools are on the way
 Judging that the draft IJTAG standard (IEEE P1687) is close enough to completion, ASSET has announced that it is committed to developing tools conforming to the IJTAG preliminary standard.
“Electronics manufacturers are realizing that the external design validation, test and debug technologies that they have now are simply running out of gas,” said Woppman. “As a result, chip vendors as well as the system manufacturers themselves are embedding instruments into silicon. Now, the system manufacturers need open tools to work with these embedded instruments. For the sake of efficiency, these tools must be able to manage embedded instruments from any chip vendor or instruments based on proprietary technology. This is where the IJTAG standard comes in.”
“It is fairly common to develop silicon or tools conforming to a preliminary standard so that manufacturers can become acquainted with the standard before its final ratification. We went though this same process with the original boundary-scan standard (IEEE 1149.1 JTAG) when, as part of Texas Instruments, we committed to developing tools before the standard was ratified and, in the long run, we believe we accelerated the adoption of boundary scan. As a tools supplier, we think it is critical at this time to send a message to the industry that we will support IJTAG.”
Two Embedded Instrumentation Experts Join ASSET
 To put ASSET’s IJTAG development efforts on a fast-track, two well known experts recently joined the company. Al Crouch, formerly chief scientist and director of research and development at Inovys Corp. of Pleasanton, Calif., and Verigy Ltd. of Cupertino, Calif., has joined ASSET as Chief Technologist, Core Instrumentation. Mr. Crouch has served for the last three years as the vice chairman of the IEEE P1687 IJTAG working group that is developing the IJTAG standard. Over the last 20 years, he has accrued vast experience in chip design-for-test at both Freescale Semiconductor (formerly Motorola) and Texas Instruments. Mr. Crouch has filed for more than 30 patents and been granted 13.
 In addition to Mr. Crouch, John Potter, formerly the principal automation architect at Inovys Corp. and an engineering supervisor at Motorola Corporation has joined ASSET’s IJTAG tools development effort as Senior Principle Designer, Core Instrumentation. Mr. Potter is also a member of the P1687 IJTAG working group. Over the last 18 years in the electronics industry, he has filed for four patents and been granted two.
“There is a great deal of validation and test instrumentation technology that is being embedded into silicon these days,” said Mr. Crouch. “What’s needed today is an open environment that can access all of this embedded instrumentation technology to organize it, schedule its execution, access data collected by the instruments, analyze this data and exert control over these embedded technologies. The IJTAG standard, once it is ratified, will provide the framework for doing this and ASSET is well on its way to providing the open tools that are needed.”
ScanWorks® – The Embedded Instrumentation Platform
Through its ScanWorks platform, ASSET is applying the experience it has gained from two decades as a leading supplier of boundary-scan test tools to the development of open embedded instrumentation tools. The boundary-scan infrastructure that is embedded into chips and circuit boards is one of several technologies that can form the basis for an embedded instrumentation toolset. In recent years, ASSET has significantly enhanced its ScanWorks® platform with embedded instrumentation capabilities such as CPU-emulation functional test, signal integrity analysis utilizing embedded Intel® IBIST (Interconnect Built In Self Test) technology and others.
| 
