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Guide to Intel Debug and Trace

One of the industry’s leaders in x86 Debug and Trace technologies, Larry Traylor, has written the ultimate guide for UEFI and platform validation engineers. Full of helpful tips and techniques for both novice and experienced debug engineers, it’s a book you’ll pull off the shelf time and again when those nasty bugs raise their heads.

Table of Contents

  • UEFI development         
  • Possible Debug Use Cases and Features             
  • Debug topologies vs chip type 
  • Event Trace       
  • Introduction to Trace Hub and its relation to Intel PT   
  • How Trace Hub can shorten the time to find the really hard bugs          
  • What it takes to use the Trace Hub       
  • STM via Trace Hub overcomes performance issues of Printf techniques             
  • Instruction Trace            
  • How Intel Processor Trace compresses the information              
  • Trace features used by ASSET InterTech’s SourcePoint tools    
  • The older Intel Trace methods
  • Use Models and Advantages for High Speed Trace        
  • How Trace can be displayed in modern tools like SourcePoint 
  • Call Graph Display          
  • Using the Statistics View to Tune Execution Times         
  • Other Features of SourcePoint that Make Use of Trace               
  • Debug Consent Considerations
  • The transition to DCI