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Testing System Clocks with an FPGA and JTAG | Boundary Scan

System clocks are fundamental for booting prototype boards or PCBs in production. Faulty clocks create havoc for any functional circuitry like processors, chipsets, ASICs and FPGAs. Even the operating system or the system’s firmware environment depend on them. Without them, you’re done.

Savvy engineers will quickly rule out faulty system clocks from their list of possible errors. By testing the clocks first, or relatively early in the test sequence, you allow adequate time for more robust functional testing later during manufacturing.

This eBook explains how system clocks can be tested with simple, yet cost-effective and powerful methods based on non-intrusive embedded instruments.

Key Points:

  • Testing clocks without probes
  • Boundary scan put to good use
  • JTAG + FPGA IP instruments
  • Testing functionality of slow clocks