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ASSET aligns company, technology and products with embedded instrumentation
Building on its JTAG leadership, ASSET applies boundary scan expertise to the industry's move toward embedded instrumentation
May 13, 2008 - Responding to the increasing momentum in the electronics industry toward embedded instrumentation, ASSET® InterTech, Inc. announced it is positioning the company, its products and its technologies to provide open tools for embedded instrumentation in design validation, test and debug applications.
Many of the established validation and test technologies are inadequate or ineffective for high-speed chips, I/O buses and systems. Moreover, new chip geometries at 45 nanometers (nm) or smaller, as well as chip-level packaging technologies like system-in-package (SiP) are making validation, test and debug very difficult, if not impossible with traditional technologies. Building on its long-established leadership in non-intrusive boundary-scan structural test based on the IEEE 1149.1 JTAG standard, ASSET has significantly enhanced its ScanWorks® platform over the last several years with embedded instrumentation capabilities. According to Glenn Woppman, president and CEO of ASSET, the company will continue to lead in JTAG structural test while developing innovative and open embedded instrumentation solutions.
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Glenn Woppman, president and CEO of ASSET InterTech, explains the company's alignment with embedded instrumentation, a technology that is becoming critical in high-speed computer, communications and electronics systems.
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