I’m sometimes asked how JTAG, IJTAG and boundary scan all relate to one another. Here’s a short explanation.
IJTAG, the short form for “Internal JTAG”, refers to the upcoming IEEE 1687 standard. The current official title of this new standard is the IEEE P1687 Standard for Access and Control of Instrumentation Embedded within a Semiconductor Device. This IEEE Standard effort, which is co-chaired by Al Crouch, ASSET’s chief technologist for core instrumentation, promises complete re-use of chip Built-In Self Test (BIST). The implications for the chip and circuit board industry are far-reaching: test routines that are developed initially for semiconductor characterization can be deployed in board and system validation, test and debug applications. This portends a significant cost reduction for design and test engineers, along with greatly enhanced fault coverage and diagnostics.
You can read more about the standard, which is expected to be ratified later this year or early 2012, in our short whitepaper available here.
IJTAG uses the JTAG infrastructure within silicon to provide physical access to embedded instruments; hence the short form Internal JTAG. JTAG itself has been around since the early 1990s and, to be technically precise, provides the chip instruction, data and state logic necessary to support validation, test and debug applications. One of these applications is the well-known boundary scan, codified within the IEEE 1149.1 Standard, which is used to perform circuit board shorts/opens testing and device programming. Boundary scan itself has several manifestations, including the IEEE 1149.6 Boundary-Scan Standard for Advanced Digital Networks, the IEEE 1149.7 Standard for Reduced-pin and Enhanced-functionality Test Access Port and Boundary-Scan Architecture, and the IEEE 1532 In-Circuit Configuration Standard. A great tutorial on boundary scan, JTAG and IJTAG can be found here.
