I get excited whenever we have an opportunity to assist the defense community with engineering challenges, whether those challenges are in the form of hardware or software, design or manufacturing.
The excitement for these opportunities might come from my work at Lockheed Martin or my service as a Navy veteran (submariner). We recently had an opportunity to help a defense contractor who was using a Zynq SoC and having problems with the DDR connectivity. We have recently released a new group of products targeted at engineers working with this SoC. I know from my experience that the defense industry is combating many challenges and their processes of design and code reviews are extensive. Yet the design/deployment cycle is shortening and the preliminary design reviews (PDR), critical design reviews (CDR) and the code walk through won’t find every problem. Sometimes it is necessary to reach out for assistance when a flaw or bug is encountered but remains hidden. Not that we could ever work in the Sensitive Compartmented Information Facility (SCIF) but, our tools and knowledge can be shared. Our enablement is designed to close the gap when developing more software by the design team isn’t the correct approach to solving a problem. Too often these design challenges burn precious project schedule or jeopardizing product delivery. We start with a commercially available board and project and then we educate the user and transfer the knowledge to their design which we can’t see.
In this case study, the contractor, based on the symptoms seen during board bring-up, realized the need to calibrate (tune) the DDR memories and the DDR PHY embedded within the memory controller, which in turn is embedded within the SoC. After looking at the Technical Reference Manual (TRM), where he found that there were over 800 pages of documentation and several hundred pages dedicated to DDR tuning, he started surfing the web. I know that if a design is classified that surfing the web is not that easy from within the SCIF. But researching data on commercial tools can be accomplished outside the restrictions of the SCIF if the need is great enough. DDR calibration requires writing to many registers in a programmatic fashion to capture the data that provides the setting for each channel to center the reads/write at optimal condition. Although this contractor started with calibration as his fundamental premise, which was the source of the problem, it turns out that the problem was more fundamental than just tuning the DDR PHY. Read more…
