Historically, hardware-assisted debugger access to Intel platforms was via a proprietary XDP 60-pin connector. This has now changed, with JTAG access available over USB3 ports.
From roughly 2006 through 2015, most Intel printed circuit board (PCB) designs allowed JTAG access only over a proprietary 60-pin connector called the XDP (short for eXtended Debug Port). Access to this connector is sometimes problematic, whether because of obstructions on the PCB, or removal of the header (to save cost or improve platform security). Even if the header is there and unobstructed, sometimes it is simply inaccessible, because the chassis is “closed”; for example, within a sealed tablet, or within a blade within a chassis within a data center.
On the newest Intel silicon, an alternate debug access mechanism is available. This Direct Connect Interface (DCI) overloads an existing USB3 port on the Intel platform and allows connection of the hardware probe over a standard USB cable, as opposed to over the XDP. This is called “closed chassis access” and greatly simplifies the access mechanism. Hardware probes which use this new approach are called closed chassis adapters (CCA for the Intel version) or closed chassis controllers (CCC for the ASSET version). These new probes are much simpler and lower-cost than their XDP counterparts. A picture of the CCC is below. It connects back to the debug host (running SourcePoint) over USB or Ethernet, and connects to the Intel-based target over an appropriately-enabled USB3 port.
More detail on the CCC, and the nature and constraints of the DCI, can be found within the Closed Chassis Controller datasheet (note: requires registration).
