Boundary Scan Archives | Page 12 of 14

Testing PCI Express

Alan Sguigna

August 16, 2012
8:16 pm

PCI Express (PCIe) buses, in particularly Gen3, are susceptible to defects which may be masked from conventional test. What are these defects and how are they detected?

How to test DDR3, DDR4 and other memory buses is top-of-mind for many engineers. And rightfully so.

Alan Sguigna

July 25, 2012
2:55 pm

Testing high-speed memories soldered to a circuit board is as elusive as it is critical for overall system performance. Testing DDR3 and DDR4 memory buses can be particularly tricky, given the fact that DDR is so fast and that the bus carries the clock and data on both the rising and falling edges of the signal. Sorting all of that out and making sure it stays sorted out over the life cycle of a system can be a daunting challenge.

You, our users, show us the full potential of new boundary-scan test tools

Kent Zetterberg

July 2, 2012
10:53 am

The Limitations of Boundary Scan on ICT

Alan Sguigna

May 28, 2012
4:12 pm

Many legacy In-Circuit Testers (ICT) support some kind of boundary scan for structural testing, to address limited access issues. But are these as good as advertised?

Flying Probe Testers and Boundary Scan

Alan Sguigna

May 13, 2012
9:47 am

Today’s flying probe testers can give high structural test coverage, making them ideal for prototype board bring-up and low-volume manufacturing. But they can be darned slow. Can boundary scan help?

Increasing densities and shrinking form factors

Alan Sguigna

April 15, 2012
6:09 pm

Isn’t it a great time to be a board designer? Compared to twelve years ago, the average number of nets has gone from 1,544 to 2,832; the number of pin-to-pin connections has increased from 7,661 to 13,573; the number of components has grown from 1,120 to 3,518; and many other challenges to the job have arisen.

Why use boundary-scan to program flash memory?

Kent Zetterberg

March 27, 2012
5:23 am

What is Board Bring-Up, and why does it take so long?

Alan Sguigna

March 21, 2012
3:48 pm

Board bring-up is a phased process whereby an electronics system is repeatedly tested, validated and debugged, in order to achieve readiness for manufacture. This process can take so long that a product never gets to market because it is succeeded by the next generation...

Fast Flash Programming

Alan Sguigna

February 12, 2012
4:07 pm

Programming NOR or large NAND flash devices can be done using a variety of technologies, including boundary scan (JTAG), processor-controlled test (emulation), or FPGA-controlled test. Which embedded instrument you use is a trade-off between speed, complexity and cost.

Arguing in the Lab?… Never during board bring-up

Larry Osborn

February 11, 2012
8:25 am

Category: Boundary Scan

Testing PCI Express

How to test DDR3, DDR4 and other memory buses is top-of-mind for many engineers. And rightfully so.

You, our users, show us the full potential of new boundary-scan test tools

The Limitations of Boundary Scan on ICT

Flying Probe Testers and Boundary Scan

Increasing densities and shrinking form factors

Why use boundary-scan to program flash memory?

What is Board Bring-Up, and why does it take so long?

Fast Flash Programming

Arguing in the Lab?… Never during board bring-up

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