JTAG is coming up on its 30th anniversary. And some would say itโs older than that. As I prepared for doing an introductory presentation on this amazing technology, I got a chance to reflect on how useful it has become, and what the next 30 years might be like.
ASSET recently released an enhanced product for testing i.MX6-based board designs using JTAG. I fired up this new tool on the Boundary Devices SABRE Lite board, with some fun and interesting results.
In Part 3 of this series, I looked at the JTAG scan path of the ASSET ScanLite demo board, and explored some of the fundamentals of IEEE 1149.1. This week, I do some fault insertion on the scan path, and see how that is detected by boundary scan.
In the last blog, I explored the JTAG scan path of the ScanLite demonstration board. In this article, I do a deeper dive into what options are available within ScanWorks to verify the scan path, and explore some of the underlying technology of IEEE 1149.1.
Iโve gotten all of my Christmas shopping done early, so I managed to make some time for exploring our ScanWorks test tool. Iโm taking a โnewbie approachโ to using the tool, initially for hacking around with boundary-scan test. Thereโs some pretty cool technology here.