Category: Embedded Diagnostics

Debug of Intel CATERR

Alan Sguigna

September 9, 2018
4:36 pm

In my last article, I outlined a short embedded JTAG-based ‘C’ routine to dump machine check errors in the event of a system crash or hang. In today’s blog, I look at this in the larger context of diagnosing the root cause of system wedges, and what embedded ITP techniques can be used to gather as much forensics data as possible.

A Short Routine to Dump Machine Check Errors Using Embedded ITP

Alan Sguigna

August 26, 2018
1:39 pm

ASSET implements in-situ diagnostics via direct support of the x86 JTAG-based run-control API down on the target. The run-control API are synonymous with lower-level Intel In-Target Probe (ITP) procedures. What follows is a sample ‘C’ routine written to dump the contents of the machine check registers, in the event of a system wedge (for example, a three-strike event).

Timing Benchmarks for BMC-Assisted Embedded JTAG

Alan Sguigna

May 20, 2018
5:33 pm

Moving run-control (Intel In-Target Probe, or ITP) down into the service processor on an x86 design results in a screamingly fast, scalable implementation of at-scale debug. This article contains some timing benchmarks of our embedded solution versus alternatives. The results are nothing short of astonishing.

Built-In Self Test (BIST) for PCI Express using Embedded Run-Control

Alan Sguigna

April 22, 2018
8:40 pm

In previous articles, I’ve written about the use of JTAG-based run-control for remote debug. Facebook presented an example of this a few weeks ago at the Open Compute Summit. This blog describes the real-time performance of such a BIST we designed for PCI Express link training tests.

Facebook OpenBMC At-Scale Debug at the OCP Summit

Alan Sguigna

April 15, 2018
6:05 pm

ASSET gets a nod at the Open Compute Summit for our leadership in At-Scale Debug.

Embedded JTAG for Built-In Self Test

Alan Sguigna

April 8, 2018
9:01 pm

Embedding JTAG into a system’s service processor allows for powerful out-of-band (independent of the operating system) built-in self test (BIST) functions. Using JTAG-based boundary scan, for example, can isolate system failure root cause to an extent unachievable through any other means.

Embedded Run-Control for Power-On Self Test

Alan Sguigna

March 18, 2018
5:07 pm

High-end, mission-critical systems often use a plethora of diagnostic routines for power-on self test (POST), data logging, operational measurements, Built-In Self Test (BIST), and platform audits. Embedded x86 JTAG run-control adds out-of-band services to this mix. This article describes one such use case for Power-On Self Test (POST) of PCI Express ports.

Embedded API library for at-scale JTAG-based hardware-assisted debugging

Alan Sguigna

February 14, 2018
7:31 am

Out-of-band access between on-board BMCs and CPU JTAG chains is now a de facto implementation on hyperscale servers manufactured by the ODMs. This article describes the BMC firmware library within our ScanWorks Embedded Diagnostics (SED) product used to run diagnostics at-scale.

Spectre, Meltdown, and embedded MSR access

Alan Sguigna

February 5, 2018
6:52 am

In the article JTAG and run-control API in BMCs for at-scale debug, I described how embedding the Intel ITP run-control library down on a service processor provides for a rich set of target-based functions for debug forensics. How might this apply to reading MSRs, such as the ones created to address Spectre and Meltdown.

JTAG and run-control API in BMCs for at-scale debug

Alan Sguigna

December 21, 2017
7:33 am

Truly at-scale debugging requires both JTAG Master and run-control functions to be embedded within server BMCs. Why is this true, and what extra capabilities become available?

Category: Embedded Diagnostics

Debug of Intel CATERR

A Short Routine to Dump Machine Check Errors Using Embedded ITP

Timing Benchmarks for BMC-Assisted Embedded JTAG

Built-In Self Test (BIST) for PCI Express using Embedded Run-Control

Facebook OpenBMC At-Scale Debug at the OCP Summit

Embedded JTAG for Built-In Self Test

Embedded Run-Control for Power-On Self Test

Embedded API library for at-scale JTAG-based hardware-assisted debugging

Spectre, Meltdown, and embedded MSR access

JTAG and run-control API in BMCs for at-scale debug

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