I was up in Chicago last week, attending the IEEE-sponsored AUTOTESTCON conference. ASSET demonstrated our ScanWorks boundary-scan test support of the Teradyne High-Speed Subsystem (HSSub).
We announced today the extended integration of ScanWorksโ boundary-scan test capabilities with the Teradyneโs PXI Express-based High Speed Subsystem (HSSub). Come see a demo at Booth #101 at the AUTOTESTCON conference!
In recent years, the increasing size of flash memory has driven device programming to offline methods. However, new techniques are significantly reducing in-system programming times, making it much more feasible and convenient to program flash memory after itโs already been soldered to the board.
Boundary scan is known to be quite slow to program large flash devices. But, with a new approach using SPI Master IP within an FPGA, flash programming time can be decreased by a factor of 15 or more.