Category: Software Debug and Trace – Intel

Using Embedded Run-Control for PCIe Link Training Testing

Alan Sguigna

November 6, 2016
5:43 pm

It is often part of a hardware validation test suite to initiate multiple PCIe bus retrains, looking for hardware design issues, or LTSSM RTL bugs in the device under test. These test suites take a very long time to run. Is there a way to speed them up?

Using Trace to Diagnose the Blue Screen of Death (BSOD)

Alan Sguigna

October 30, 2016
8:32 pm

One in 10,000 times, your notebook crashes when you wake it up in the middle of a backup of your hard disk. No big deal?

Linux on UEFI-based ARMv8 Servers

Alan Sguigna

October 16, 2016
7:06 pm

A few weeks ago ASSET attended the UEFI Forum Plugfest, where a number of ARM 64-bit servers were on display. How does ARM play in a UEFI world?

Open Compute Project, and Containers vs VMs

Alan Sguigna

October 2, 2016
3:46 pm

ASSET joined the Open Compute Project (OCP) earlier this year, and we attended our first Engineering Workshop in Dallas last week. The theme of this session was the OCP Telco Project. What did we learn?

2016 UEFI Forum Plugfest – Seattle, WA

Alan Sguigna

September 25, 2016
4:09 pm

ASSET (yours truly) attended the September 2016 Plugfest at the UEFI Forum in Seattle, WA. Was it worthwhile?

Debugging platform issues with Intel CScripts

Alan Sguigna

September 11, 2016
3:08 pm

How useful are the Intel Customer Scripts (“CScripts”) for debugging system issues?

Dumping Intel MSRs from Crashed Systems Remotely using Embedded ITP

Alan Sguigna

August 28, 2016
4:02 pm

When an x86 system has crashed, gathering forensics data to help diagnose root-cause of the failure is a top priority. But, how is this done if the system has crashed, and OS/BIOS-based application programs cannot access the platform?

The Third Type of JTAG Access on Intel-based Designs

Alan Sguigna

July 31, 2016
4:22 pm

In my last blog, I introduced the three types of JTAG access for debug applications. This article delves into the third type, Embedded ITP.

The Three Types of JTAG Access on Intel-based Designs

Alan Sguigna

July 24, 2016
5:02 pm

Pop quiz: there are three main mechanisms to access debug embedded instrumentation within Intel silicon. What are they?

ASSET joins the Open Compute Project

Alan Sguigna

July 17, 2016
2:49 pm

The mission of the Open Compute Project (OCP) is to design and enable the delivery of the most efficient server, storage and data center hardware designs for scalable computing. ASSET has just joined the OCP to contribute to the reliability and availability of OCP designs.

Category: Software Debug and Trace – Intel

Using Embedded Run-Control for PCIe Link Training Testing

Using Trace to Diagnose the Blue Screen of Death (BSOD)

Linux on UEFI-based ARMv8 Servers

Open Compute Project, and Containers vs VMs

2016 UEFI Forum Plugfest – Seattle, WA

Debugging platform issues with Intel CScripts

Dumping Intel MSRs from Crashed Systems Remotely using Embedded ITP

The Third Type of JTAG Access on Intel-based Designs

The Three Types of JTAG Access on Intel-based Designs

ASSET joins the Open Compute Project

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