In the last episode, I got the Sato SDK Yocto image running on my MinnowBoard, and explored some of the debug and trace tools therein. This week, I took a side trip to see if I could get the Yocto image running within Oracleโs VirtualBox.
In this weekโs episode, I build some additional Yocto Linux images, beyond simply the minimal base image. Then I start having some fun debugging them.
Moving run-control (Intel In-Target Probe, or ITP) down into the service processor on an x86 design results in a screamingly fast, scalable implementation of at-scale debug. This article contains some timing benchmarks of our embedded solution versus alternatives. The results are nothing short of astonishing.
In Episode 31: First attempts to debug the Linux kernel and prior episodes of the MinnowBoard Chronicles eBook, you can see how I struggled unsuccessfully to install a Yocto image I built onto the MinnowBoard. Well, this week, I got it to work! Hereโs the trick.
Larry Traylor, an industry luminary in the world of x86 architecture debug and trace technologies, has published a new eBook on this fascinating topic. Hereโs my review.
In previous articles, Iโve written about the use of JTAG-based run-control for remote debug. Facebook presented an example of this a few weeks ago at the Open Compute Summit. This blog describes the real-time performance of such a BIST we designed for PCI Express link training tests.
For those who may have missed it, I've been blogging about my experiences with the MinnowBoard Turbot for the last 15 months. Now, finally, all the blogs have been combined into a 138-page compendium of my learnings about x86 architecture, UEFI, Yocto Linux, and many other technical topics. Check it out at The MinnowBoard Chronicles (note: requires registration).ย
High-end, mission-critical systems often use a plethora of diagnostic routines for power-on self test (POST), data logging, operational measurements, Built-In Self Test (BIST), and platform audits. Embedded x86 JTAG run-control adds out-of-band services to this mix. This article describes one such use case for Power-On Self Test (POST) of PCI Express ports.