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In Episode 2 of the Basys Chronicles, I configured (programmed) the Artix-7 FPGA with a simple Binary-to-Decimal calculator application, through the USB-JTAG port. But, power down the Basys 3, and it goes back to the Built-In Self Test that comes with the board. This week, I flashed the calculator configuration into the nonvolatile SPI flash, making it the default boot-up configuration.
In the Basys Chronicles Episode 1, I started to learn about FPGA programming using Xilinxโ€™s Vivado tool and the Digilent Basys 3 Trainer Board. Now, after a few weeks (okay, time flies; itโ€™s been almost two months), Iโ€™ve made some good headway in understanding FPGA architecture and creating some interesting designs that do useful things.
This past week, I attended the AUTOTESTCON 2019 conference, the premiere Defense Automated Test Equipment show, that has the theme of โ€œincreased mission effectiveness through advanced test and support technologyโ€. As you may have seen, I was honored with the โ€œWalter E. Peterson Best Paper on New Technologyโ€ award for Mitigating JTAG as an Attack Surface (note: it might take a little while for the paper to be posted on IEEE Xplore; you might have to check back later).
In a prior blog, I wrote about the JTAG specificationโ€™s upcoming 30th anniversary, and reflected on how it has evolved over the years, and the powerful use cases it can be put to. This week, we look at how to secure the JTAG interface, to prevent its abuse by bad actors.
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