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Debugging platform issues with Intel CScripts

Alan Sguigna

September 11, 2016
3:08 pm

How useful are the Intel Customer Scripts (“CScripts”) for debugging system issues?

Boundary-Scan Test on the TI MSP430

Alan Sguigna

September 5, 2016
1:53 pm

The MSP430 is a mixed-signal microcontroller family from Texas Instruments. Built around a 16-bit CPU, the MSP430 is designed for low cost, low power consumption embedded applications. But, does it support boundary scan for board test purposes?

Dumping Intel MSRs from Crashed Systems Remotely using Embedded ITP

Alan Sguigna

August 28, 2016
4:02 pm

When an x86 system has crashed, gathering forensics data to help diagnose root-cause of the failure is a top priority. But, how is this done if the system has crashed, and OS/BIOS-based application programs cannot access the platform?

Using Boundary-Scan Test at Debug & Repair Stations

Alan Sguigna

August 14, 2016
3:06 pm

Is it possible to use JTAG at debug & repair depots to reduce the cost of diagnosing bad boards?

The Third Type of JTAG Access on Intel-based Designs

Alan Sguigna

July 31, 2016
4:22 pm

In my last blog, I introduced the three types of JTAG access for debug applications. This article delves into the third type, Embedded ITP.

The Three Types of JTAG Access on Intel-based Designs

Alan Sguigna

July 24, 2016
5:02 pm

Pop quiz: there are three main mechanisms to access debug embedded instrumentation within Intel silicon. What are they?

ASSET joins the Open Compute Project

Alan Sguigna

July 17, 2016
2:49 pm

The mission of the Open Compute Project (OCP) is to design and enable the delivery of the most efficient server, storage and data center hardware designs for scalable computing. ASSET has just joined the OCP to contribute to the reliability and availability of OCP designs.

A Different Approach to Debug Access

Alan Sguigna

July 10, 2016
3:45 pm

Historically, hardware-assisted debugger access to Intel platforms was via a proprietary XDP 60-pin connector. This has now changed, with JTAG access available over USB3 ports.

Speeding up printf for BIOS Trace

Alan Sguigna

July 4, 2016
5:22 pm

UEFI, like other embedded code bases, is riddled with printf style debug statements. In debug builds, these can slow the boot process down tremendously. There is a way to circumvent this.

Intel Processor Trace for UEFI Debug

Alan Sguigna

June 26, 2016
9:57 pm

Intel Processor Trace (Intel PT) is a capability on new Intel silicon that captures information about software execution using dedicated hardware facilities inside the chip. How is it used to debug UEFI?

Debugging platform issues with Intel CScripts

Boundary-Scan Test on the TI MSP430

Dumping Intel MSRs from Crashed Systems Remotely using Embedded ITP

Using Boundary-Scan Test at Debug & Repair Stations

The Third Type of JTAG Access on Intel-based Designs

The Three Types of JTAG Access on Intel-based Designs

ASSET joins the Open Compute Project

A Different Approach to Debug Access

Speeding up printf for BIOS Trace

Intel Processor Trace for UEFI Debug

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