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Remote Application of Intel CScripts

Alan Sguigna

October 11, 2015
5:00 pm

Intel CScripts are very valuable for debug and validation of everything from smartphones to servers. They acquire even more power when they can be applied remotely.

Data Mining Analytics Improves Serdes HSIO Validation

Tim Caffee

October 7, 2015
1:12 pm

High Availability within Software-Defined Networks

Alan Sguigna

September 27, 2015
5:48 pm

As network functions become virtualized and proprietary hardware migrates to commodity Intel-based servers, will Carrier service levels degrade?

JTAG|DDR4 Connectivity Test Mode (JESD79-4)

Kent Zetterberg

September 22, 2015
2:45 pm

Recently launched DDR4 devices have what memory device vendors may refer to as a “boundary scan” test mode. Even though there’s not really a boundary-scan function involved on the DDR4 side, this mode actually has been, as claimed by JEDEC, “designed to work seamlessly with any boundary-scan devices.” Here’s a brief introduction to what it does and how to test it with a boundary-scan (JTAG) tool.

Advanced firmware debugging of BMCs

Alan Sguigna

September 20, 2015
3:30 pm

Baseboard Management Controllers (BMCs) form the brains of any high-end Intel-based server platform: they perform system management functions ranging from fan speed control to remote user authentication. A new wave of these service processors is coming to market to support new capabilities needed on the next generation of Intel silicon. What are these unique features, and how will they be debugged?

JTAG Boundary-Scan Test for the Intel Innovation Engine

Alan Sguigna

September 13, 2015
3:23 pm

As described in earlier blogs, the new Intel Innovation Engine (IE) makes an ideal host for validation, debug, trace and test applications on Intel platforms. This article details the implementation of a JTAG execution engine on the IE for the purposes of printed circuit board structural and functional testing.

Using the Intel Innovation Engine for Embedded DDR4 Memory Test

Alan Sguigna

September 7, 2015
3:28 pm

Last week, I wrote about Intel’s public announcement of the Innovation Engine (IE), an Intel architecture processor and I/O sub-system embedded into their upcoming generations of server platforms. This article describes the use of the IE for JTAG boundary-scan testing of memories.

Intel Innovation Engine with ScanWorks Embedded Diagnostics

Alan Sguigna

August 30, 2015
3:57 pm

Just this past week, Intel announced the Innovation Engine, a small Intel architecture processor and I/O sub-system embedded into their upcoming generations of server platforms. What is its purpose, and what new applications can run on it?

Correlating Run-Control and Trace

Alan Sguigna

August 23, 2015
5:55 pm

In my last blog, I reviewed the difference between Run-Control and Trace, as two powerful debugging technologies. How are they used together to dramatically improve the chances of catching an intermittent bug?

Embedded Boundary-Scan Test

Alan Sguigna

August 2, 2015
6:09 pm

Boundary-scan test is used commonly on manufacturing lines with a “benchtop” tester, complete with cables, fixturing, hardware probes, and so on. What are the pros and cons of embedding this technology in-situ?

Remote Application of Intel CScripts

Data Mining Analytics Improves Serdes HSIO Validation

High Availability within Software-Defined Networks

JTAG|DDR4 Connectivity Test Mode (JESD79-4)

Advanced firmware debugging of BMCs

JTAG Boundary-Scan Test for the Intel Innovation Engine

Using the Intel Innovation Engine for Embedded DDR4 Memory Test

Intel Innovation Engine with ScanWorks Embedded Diagnostics

Correlating Run-Control and Trace

Embedded Boundary-Scan Test

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