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The Limitations of Boundary Scan on ICT

Alan Sguigna

May 28, 2012
4:12 pm

Many legacy In-Circuit Testers (ICT) support some kind of boundary scan for structural testing, to address limited access issues. But are these as good as advertised?

Pollution, Power Margins, and SerDes Problems

Alan Sguigna

May 20, 2012
8:59 pm

Flying Probe Testers and Boundary Scan

Alan Sguigna

May 13, 2012
9:47 am

Today’s flying probe testers can give high structural test coverage, making them ideal for prototype board bring-up and low-volume manufacturing. But they can be darned slow. Can boundary scan help?

End the flash programming merry-go-round

Larry Osborn

April 25, 2012
1:50 pm

PCI Express Loopback and PCI-SIG

Eric Johnson

April 18, 2012
2:01 pm

Increasing densities and shrinking form factors

Alan Sguigna

April 15, 2012
6:09 pm

Isn’t it a great time to be a board designer? Compared to twelve years ago, the average number of nets has gone from 1,544 to 2,832; the number of pin-to-pin connections has increased from 7,661 to 13,573; the number of components has grown from 1,120 to 3,518; and many other challenges to the job have arisen.

Why use boundary-scan to program flash memory?

Kent Zetterberg

March 27, 2012
5:23 am

When Gigabit Ethernet isn’t fast enough

Alan Sguigna

March 25, 2012
2:43 pm

My neighbor’s son ripped out all the Cat 5e cable in his house and replaced it with Cat 6 cable. Why did he do that?

What is Board Bring-Up, and why does it take so long?

Alan Sguigna

March 21, 2012
3:48 pm

Board bring-up is a phased process whereby an electronics system is repeatedly tested, validated and debugged, in order to achieve readiness for manufacture. This process can take so long that a product never gets to market because it is succeeded by the next generation...

High-Speed I/O Design Guidelines

Alan Sguigna

March 10, 2012
2:54 pm

I was reading a Design Guidelines document recently that nicely summarized what to watch out for when designing circuits with high-speed I/O. There are so many things that can go wrong, so careful design and accurate measurements are essential.

The Limitations of Boundary Scan on ICT

Pollution, Power Margins, and SerDes Problems

Flying Probe Testers and Boundary Scan

End the flash programming merry-go-round

PCI Express Loopback and PCI-SIG

Increasing densities and shrinking form factors

Why use boundary-scan to program flash memory?

When Gigabit Ethernet isn’t fast enough

What is Board Bring-Up, and why does it take so long?

High-Speed I/O Design Guidelines

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