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Hypervisor and OS Kernel Debug with DCI on the AAEON Whiskey Lake board

Alan Sguigna

July 17, 2022
7:09 pm

DCI debug of UEFI and hypervisor technologies with full source code.

Advanced Breakpoints for AMD Debug

Alan Sguigna

July 1, 2022
5:56 pm

It’s probably not well-known, but AMD platforms have special low-level breakpoint capabilities that aren’t available on Intel platforms. They are extremely powerful; here’s how to use them.

JTAG Debug using DCI on the AAEON UP Xtreme Whiskey Lake board

Alan Sguigna

March 27, 2022
12:13 pm

If you want to learn about UEFI, you have to be able to see the source code and debug it. Here’s how to build a debug Tianocore image on the AAEON UP Xtreme Whiskey Lake board, flash it onto the target, and use SourcePoint to debug it with Intel Direct Connect Interface (DCI).

Using JTAG for Hypervisor Debug: Part 3

Alan Sguigna

February 21, 2022
5:34 pm

Using a JTAG-based debugger to do Type 1 UEFI hypervisor debug.

SourcePoint Hobbyist Update, and Hypervisor Course Review

Alan Sguigna

February 6, 2022
3:25 pm

A status update on SourcePoint Intel JTAG debugger for individual hobbyists and researchers, and a refresher on hypervisor development.

Debugging Type 1 Hypervisors on the UP Xtreme i11 using JTAG/DCI

Alan Sguigna

November 28, 2021
1:03 pm

An example of debugging a Type 1 hypervisor using JTAG and DCI on a commercially available board.

Vivado Programming Production Challenges – Here’s a Better Way

Larry Osborn

November 17, 2021
4:37 pm

Recently as ASSET is a 3rd party tool supporter of Xilinx FPGAs for a number of applications, I was reviewing the Xilinx community seeing a lot of users trying to use Vivado and Platform Cable USB II pod for production in-system programming with less-than-optimal results or no results at all. First, Xilinx says the Platform Cable USB II with Vivado/SDK as the UI, is to be used for prototype programming and is a design tool, not a production tool.

DCI Debug on the AAEON UP Xtreme i11 board

Alan Sguigna

October 31, 2021
5:24 pm

Finally! A publicly available board with Intel Direct Connect Interface (DCI) working out of the box. With our SourcePoint JTAG-based debugger, it is now possible to explore the inner workings of low-level firmware with all the power of CPU-hardware-assisted run-control and trace features, including Intel Processor Trace and Architectural Event Trace.

Webinar: Beyond printf

Alan Sguigna

October 17, 2021
5:46 pm

In collaboration with the UEFI Forum, I’ll be presenting Beyond Printf: Real-Time UEFI Debugging on Wednesday, October 27th, 2021 at 10am CT. Register here: https://www.brighttalk.com/webcast/18206/512103 to watch the session live, and/or later view the recorded video. What powerful new debugging and trace features exist on the latest Intel silicon? Continue reading, or watch the webinar.

Using the Intel Trace Hub for at-speed printf

Alan Sguigna

September 6, 2021
5:27 pm

For debugging firmware, print statements (“printf”) are often our most powerful tool: some bugs are caused by complex sequences of events that are too long and intricate to root-cause using just breakpoints and watch windows. In this article, I write about my explorations into “at-speed printf”.

Hypervisor and OS Kernel Debug with DCI on the AAEON Whiskey Lake board

Advanced Breakpoints for AMD Debug

JTAG Debug using DCI on the AAEON UP Xtreme Whiskey Lake board

Using JTAG for Hypervisor Debug: Part 3

SourcePoint Hobbyist Update, and Hypervisor Course Review

Debugging Type 1 Hypervisors on the UP Xtreme i11 using JTAG/DCI

Vivado Programming Production Challenges – Here’s a Better Way

DCI Debug on the AAEON UP Xtreme i11 board

Webinar: Beyond printf

Using the Intel Trace Hub for at-speed printf

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