Validating prototype circuit boards gives you a level of confidence, but variances in manufacturing processes are just as likely to erode that confidence right along with the transfer speeds on high-speed serdes traces. Find out about the many causes of process variations, their effects and, most importantly, what you can do detect variances before they take a costly toll.

This document provides an overview of the use of boundary-scan test, processor-controlled test and high-speed I/O validation when applied to the Intel® microarchitecutre code name Haswell design.

Performing signal integrity validation with traditional high-end capital equipment such as oscilloscopes is a very expensive proposition. Fortunately, Intel Interconnect Built-In Self Test (IBIST) technology now allows designers to simply, effectively and inexpensively margin their designs through a wide range of process/voltage/temperature (PVT) variables without employing an oscilloscope. This new ‘5×5’ approach (5 runs on 5 systems) allows OEMs and ODMs to hit the sweet spot between not enough testing, which can result in field repairs, warranty replacements and lost customers, and too much testing, which is overly expensive, resulting in lost profit, reduced sales and could lead to missing a market window.

An old story compares the electronics industry’s unprecedented achievements with the automotive industry. If cars had kept pace with Silicon Valley, we could buy a vehicle with a V32 engine and capable of 10,000 mph; or a 30 pound car that gets 1,000 miles to the gallon — either one at a sticker price of less than $50!

This paper describes the empirical results of platform validation using Intel® Interconnect Built-In Self Test (IBIST) and the ScanWorks HSIO product. Among the experiments conducted were: