Signal Integrity Validation Procedure for Intel® Xeon® Platforms
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Following a defined methodology is an essential step in ensuring signal integrity on Intel® Xeon® designs. An approved three-phase process is as follows:
- Optimize equalization settings
- Collect margin data and perform eye mask analysis
- Perform system-level functional tests
![Book cover image](https://www.asset-intertech.com/wp-content/uploads/2020/08/signal-integrity-validation-procedure-intel-xeon-platforms-w250.png)
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