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Webinar recording: JTAG/Boundary Scan for BIST
Latent structural faults may be undetectable by traditional functional test, manifesting themselves via system failures in the field, which is unacceptable for mission-critical applications. This dictates a new approach to built-in test: using JTAG-based boundary-scan test (BST) within system firmware, thereby eliminating the need for external physical hardware probes, and providing an in-situ mechanism for failure prevention and proactive maintenance.
This webinar describes the application of JTAG for Built-In Self Test, the technology behind it, Test Access Port (TAP) controller firmware requirements, the BST library Application Program Interface (API), and hardware design requirements.